//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
/* Copyright 2002-2003 Intel Corp.  */
/*++

Module Name:  bcr.h

Abstract:
 Contains definitions for Mainstone board configuration register (BCR) and
 system configuration register (SCR)

Notes:

--*/
#ifndef __BCR_H__
#define __BCR_H__

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#ifdef __cplusplus
extern "C" {
#endif

#include "xllp_bcr.h"

/* Function Prototypes */
int  set_BCRVal(unsigned my_bcrSetBits, unsigned my_bcrClrBits, int inpowerhandler);
unsigned get_BCRVal(void);



//TODO: create a 24bit BCR.bcr (control reg) struct for the shadow register

//define BCR masks
#define BCR_AUD_BITS_MASK   0x00004040  // all 1 bits are audio specific
#define BCR_AUD_POWER_ON    0x00000040  // Audio Power On Bit 6=1
#define BCR_AUD_SPKR_ON   	0x00004000  // Speaker Amplifier on Bit 14=1

#define BCR_AUD_POWER_OFF   0x00000040  // Audio Power On Bit 6=1
#define BCR_AUD_SPKR_ON   	0x00004000  // Speaker amplifier on Bit 14=1

#define NOMASK 				0x00000000		// used for a nop

#define INPOWERHANDLER	TRUE
#define NOTINPOWERHANDLER FALSE


/* *******************************************************************
   *  Lubbock BLR Masks.  These masks represent the bit positions
   *   necessary to read from the MISC_WR and MISC_RD registers that
   *   reside in the FPGA-implemented Board Level Register (BLR)
   *   when using get/set_BCRVal().  To conform to the current
   *   bcr.c's 32-bit parameter scheme (i.e. unsigned get_BCRVal(void);,
   *   BOOL set_BCRVal(unsigned my_bcrSetBits, unsigned my_bcrClrBits, BOOL inpowerhandler);),
   *   the MISC_WR and MISC_RD values are encoded into a single 32-bit value.
   *
   *   *Note: This mapping does *not* represent the actual register
   *   mapping.  It is merely a scheme to make use of the existing bcr routines.
   *
   *   These masks are implemented using 32-bit words.  It should
   *   be noted that MISC_WR values are shifted to the upper 16-bits
   *   and MISC_RD values are slotted into the lower 16-bits of the
   *   32-bit word.  Therefore, to use these masks, the user must
   *   perform a bitwise OR of necessary masks to form a single word.
   *******************************************************************

                                    MAINSTONE get/set_BCRVal() Layout
   -------------------------------------------------------------------------------------------------
  | 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 |
  |-------------------------------------------------------------------------------------------------|
  |              MISC_WR[15:0]                     | X  X  X  X  X  X  X     MISC_RD[8:0]           |
  |                                                |                                                |
   -------------------------------------------------------------------------------------------------

 */
#ifdef BSP_MAINSTONE
//
// *NOTE: these are largely assumptions, as although the bit positions
//   have been defined, the actual meaning for many has not!!
//

//
//  MISC_WR Values
//
#define MISC_WR_S1_PWR1			(1 << 31)			// CF1 PWR
#define MISC_WR_S1_PWR0			(1 << 30)			// CF0 PWR
#define MISC_WR_RS232_DTR		(1 << 28)			// BT RS232 DTR
#define MISC_WR_TS_nCS			(0 << 27)			// Touch CS
#define MISC_WR_LCD_DISP		(1 << 24)			// LCD_DISP signal
#define MISC_WR_PDC_XTRA2		(1 << 22)			// Processor Daughter Card Write Bit
#define MISC_WR_IRDA_MODE		(1 << 20)			// IrDA Mode Select
#define MISC_WR_GREEN_LED_ON	(0 << 19)			// Turns Green LED/Misc LED ON
#define MISC_WR_GREEN_LED_OFF	(1 << 19)			// Turns Green LED/Misc LED OFF
#define MISC_WR_ENET_nEN16		(1 << 18)			// SMSC9196 16-bit mode
#define MISC_WR_PDC_nRESET		(0 << 17)			// Resets PDC
#define MISC_WR_SDB_SW_nRESET	(0 << 16)			// System software Reset

//
//  MISC_RD Values
//
#define MISC_RD_CABLE_DETECT    (1 << 9)            // USB Cable Detect
#define MISC_RD_TS_BUSY			(1 << 8)			// Touch is busy
#define MISC_RD_ENET_nIOIS16	(1 << 7)			// SMSC9196 nIoIs16
#define MISC_RD_ENET_nREQ		(1 << 6)			// SMSC9196 nREQ
#define MISC_RD_RS232_RI		(1 << 5)			// BT RS232 Ring Indicator
#define MISC_RD_RS232_DSR		(1 << 4)			// BT RS232 Data Set Ready
#define MISC_RD_RS232_CD		(1 << 3)			// BT RS232 Carrier Detect
#define MISC_RD_SD_CARD_WRTPT	(1 << 2)			// SDCard Write-Protect

#define WRITE_HEX_LEDS(data) (v_pBLReg->hex_led = (data))

#endif // BSP_MAINSTONE


#ifdef __cplusplus
}
#endif


#endif  //__BCR_H__
